As per patent office journal dated 18/06/202, patent number 369365 has been granted to O2MICRO, INC. that is titled as Intelligent bus address self configuration in multi-module system. The primary independent claim of this patent states an apparatus having one bus port to couple the first module to a bus; a first configuration port and second configuration port for receiving the indication whether the address assignment has been enabled or disabled for the first module and the second module respectively, as inputs. The apparatus further includes a memory for storing a unique address to identify the first module and second module and a controller coupled to the central management unit through a bus that receives the unique address from the central management unit. The controller then determines whether the address assignment has been enabled/disabled for the first module and also for the second module when the second module is coupled to the first module and further stores it in the memory (only when enabled). The central management unit also detects any new module and provides a new unique address to the new module by sending a message to one module that enables or disables a new unique address assignment in the new module to provide a unique address to the new module.
During the patent prosecution, the patent examiner objected to this patent under section 3(k) of the Indian Patents Act. The patent applicant responded to this objection by stating that the mere reference to the use of a ‘procedure’, ‘method’ or ‘algorithm’ in an apparatus having various hardware elements, networks, components and the like, that determines the technical effect of the invention as a whole, does not make the claimed invention an algorithm or computer program per se as contemplated in section 3(k) of the Patents Act. Therefore, the claims of the invention do not refer to an algorithm, when applying the same principle of law.
This patent falls under the category of computer science. Overall, this patent covers an apparatus having one bus port to couple the first module to a bus; a first configuration port and second configuration port for receiving the indication whether the address assignment has been enabled or disabled for the first module and the second module respectively, as inputs. The apparatus further includes a memory for storing a unique address to identify the first module and second module and a controller coupled to the central management unit through a bus that receives the unique address from the central management unit. The controller then determines whether the address assignment has been enabled/disabled for the first module and also for the second module when the second module is coupled to the first module and further stores it in the memory.
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Advocate Rahul Dev is a Patent Attorney & International Business Lawyer practicing Technology, Intellectual Property & Corporate Laws. He is reachable at rd (at) patentbusinesslawyer (dot) com & @rdpatentlawyer on Twitter.
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